[Lazarus] fpc bug with M1 [[was: Re: UTF8LengthFast returning incorrect results on AARCH64 (MacOS)]]

Martin Frb lazarus at mfriebe.de
Tue Dec 28 23:43:46 CET 2021

On 28/12/2021 23:18, Noel Duffy via lazarus wrote:
> The assembler produced by 3.2.2 looks like this:
> # [43] Result += (pn8^ shr 7) and ((not pn8^) shr 6);
>     ldr    x0,[sp]
>     ldrsb    w0,[x0]
>     mvn    w0,w0

mvn => bitwise not. And that applies to the whole register.

So I guess "eor    w0,w0,#255 " is meant to be some optimization, but 
comes with a bug.

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